TY - GEN
T1 - Reliability enhancement using in-field monitoring and recovery for RF circuits
AU - Chang, Doohwang
AU - Ozev, Sule
AU - Bakkaloglu, Bertan
AU - Kiaei, Sayfe
AU - Afacan, Engin
AU - Dundar, Gunhan
PY - 2014/1/1
Y1 - 2014/1/1
N2 - Failure due to aging mechanisms is an important concern for RF circuits. In-field aging results in continuous degradation of circuit performances before they cause catastrophic failures. In this regard, the lifetime of RF/analog circuits, which is defined as the point where at least one specification fails, is not just determined by aging at the device level, but also by the slack in the specifications, process variations, and the stress conditions on each of the devices. In this paper, we present a methodology for analyzing, monitoring, and mitigating performance degradation in cross-coupled LC oscillators caused by aging mechanisms in MOSFET devices. At design time, we identify reliability hot spots and concentrate our efforts on improving these components. We aim at altering degradation patterns of important performance parameters, thereby improving the lifetime of the circuit with low area and no performance impact. We use simulations based on verified aging models to evaluate the monitoring and mitigation techniques and show that the proposed methods can increase the lifetime of the devices with no impact on the initial performance.
AB - Failure due to aging mechanisms is an important concern for RF circuits. In-field aging results in continuous degradation of circuit performances before they cause catastrophic failures. In this regard, the lifetime of RF/analog circuits, which is defined as the point where at least one specification fails, is not just determined by aging at the device level, but also by the slack in the specifications, process variations, and the stress conditions on each of the devices. In this paper, we present a methodology for analyzing, monitoring, and mitigating performance degradation in cross-coupled LC oscillators caused by aging mechanisms in MOSFET devices. At design time, we identify reliability hot spots and concentrate our efforts on improving these components. We aim at altering degradation patterns of important performance parameters, thereby improving the lifetime of the circuit with low area and no performance impact. We use simulations based on verified aging models to evaluate the monitoring and mitigation techniques and show that the proposed methods can increase the lifetime of the devices with no impact on the initial performance.
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U2 - 10.1109/VTS.2014.6818774
DO - 10.1109/VTS.2014.6818774
M3 - Conference contribution
AN - SCOPUS:84901918108
SN - 9781479926114
T3 - Proceedings of the IEEE VLSI Test Symposium
BT - Proceedings - 2014 IEEE 32nd VLSI Test Symposium, VTS 2014
PB - IEEE Computer Society
T2 - 2014 IEEE 32nd VLSI Test Symposium, VTS 2014
Y2 - 13 April 2014 through 17 April 2014
ER -