TY - JOUR
T1 - Online Built-In Self-Test of High Switching Frequency DC-DC Converters Using Model Reference Based System Identification Techniques
AU - Beohar, Navankur
AU - Malladi, Venkata N.K.
AU - Mandal, Debashis
AU - Ozev, Sule
AU - Bakkaloglu, Bertan
N1 - Funding Information:
Manuscript received February 21, 2017; revised July 4, 2017; accepted August 1, 2017. Date of publication August 30, 2017; date of current version January 25, 2018. This work was supported in part by NASA and in part by Space Micro Inc., San Diego, CA, USA. This paper was recommended by Associate Editor H. Lee. (Corresponding author: Navankur Beohar.) N. Beohar, D. Mandal, S. Ozev, and B. Bakkaloglu are with the School of Electrical, Computer and Energy Engineering, Arizona State University, Tempe, AZ 85287 USA (e-mail: [email protected]; [email protected]; [email protected]; [email protected]).
Publisher Copyright:
© 2017 IEEE.
PY - 2018/2
Y1 - 2018/2
N2 - A built-in self-test (BIST) technique that enables tracking of loop parameters of integrated DC-DC converters without affecting the normal mode of operation is presented. A digital pseudo-noise based stimulus and a mixed signal cross-correlation based analysis technique is used to derive on-chip impulse response, with minimum computational requirements in comparison to a digital correlator approach. Using measured impulse response, open-loop phase margin and closed-loop unity-gain frequency are estimated within 5.2% and 4.1% error, respectively, for the load current range of 30 mA to 200 mA. Converter parameters, such as natural frequency, Q-factor, and center frequency are estimated within 3.6%, 4.7%, and 3.8% error, respectively, over load inductance of 4.7 μH to 10.3 μH, and filter capacitance of 200 nF to 400 nF. A 5 MHz switching frequency, 5 V to 8.125 V input voltage range, voltage-mode controlled DC-DC buck converter is designed for the proposed model reference based parametric and non-parametric BIST analysis. The converter output voltage range is 3.3 V to 5 V and supported maximum load current is 450 mA with a peak efficiency of 87.93%. The proposed converter is fabricated on a 0.6 μm 6 layer-metal SOI technology with a die area of 9 mm2. The system identification circuitry occupies 3.8% of the converter area with 530 μA quiescent current during operation.
AB - A built-in self-test (BIST) technique that enables tracking of loop parameters of integrated DC-DC converters without affecting the normal mode of operation is presented. A digital pseudo-noise based stimulus and a mixed signal cross-correlation based analysis technique is used to derive on-chip impulse response, with minimum computational requirements in comparison to a digital correlator approach. Using measured impulse response, open-loop phase margin and closed-loop unity-gain frequency are estimated within 5.2% and 4.1% error, respectively, for the load current range of 30 mA to 200 mA. Converter parameters, such as natural frequency, Q-factor, and center frequency are estimated within 3.6%, 4.7%, and 3.8% error, respectively, over load inductance of 4.7 μH to 10.3 μH, and filter capacitance of 200 nF to 400 nF. A 5 MHz switching frequency, 5 V to 8.125 V input voltage range, voltage-mode controlled DC-DC buck converter is designed for the proposed model reference based parametric and non-parametric BIST analysis. The converter output voltage range is 3.3 V to 5 V and supported maximum load current is 450 mA with a peak efficiency of 87.93%. The proposed converter is fabricated on a 0.6 μm 6 layer-metal SOI technology with a die area of 9 mm2. The system identification circuitry occupies 3.8% of the converter area with 530 μA quiescent current during operation.
KW - Analog BIST
KW - DC-DC power converters
KW - frequency response
KW - impulse response
KW - parameter estimation
KW - pulse width modulation (PWM)
KW - switched capacitor
KW - white noise
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U2 - 10.1109/TCSI.2017.2739479
DO - 10.1109/TCSI.2017.2739479
M3 - Article
AN - SCOPUS:85028724625
SN - 1549-8328
VL - 65
SP - 818
EP - 831
JO - IEEE Transactions on Circuits and Systems I: Regular Papers
JF - IEEE Transactions on Circuits and Systems I: Regular Papers
IS - 2
M1 - 8022915
ER -