TY - GEN
T1 - Weight tuning of resistive memories and convolution kernel operation on cross-point array for neuro-inspired computing
AU - Gao, Ligang
AU - Chen, Pai Yu
AU - Yu, Shimeng
N1 - Publisher Copyright:
© 2016 IEEE.
PY - 2016
Y1 - 2016
N2 - Analog conductance of resistive memories is attractive for implementing the weights in neuro-inspired algorithms. One of the most popular deep learning algorithms is the convolutional neural network (CNN). In this paper, we review our recent progress on using resistive memories for neuro-inspired computing. First, we optimized the iterative programming protocol to tune the weights of HfOx based resistive memories by adjusting the pulse amplitude incremental steps, the pulse width incremental steps, and the start voltages. Then, we demonstrated the key operation in the CNN-the convolution kernel on a 12×12 cross-point array. As a proof-of-concept demonstration, we use the offline trained edge filters to detect both horizontal and vertical edges of the 50×50 pixels of a grayscale dog image. The experimental kernel operation matches the simulation results.
AB - Analog conductance of resistive memories is attractive for implementing the weights in neuro-inspired algorithms. One of the most popular deep learning algorithms is the convolutional neural network (CNN). In this paper, we review our recent progress on using resistive memories for neuro-inspired computing. First, we optimized the iterative programming protocol to tune the weights of HfOx based resistive memories by adjusting the pulse amplitude incremental steps, the pulse width incremental steps, and the start voltages. Then, we demonstrated the key operation in the CNN-the convolution kernel on a 12×12 cross-point array. As a proof-of-concept demonstration, we use the offline trained edge filters to detect both horizontal and vertical edges of the 50×50 pixels of a grayscale dog image. The experimental kernel operation matches the simulation results.
UR - http://www.scopus.com/inward/record.url?scp=85028646210&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=85028646210&partnerID=8YFLogxK
U2 - 10.1109/ICSICT.2016.7998889
DO - 10.1109/ICSICT.2016.7998889
M3 - Conference contribution
AN - SCOPUS:85028646210
T3 - 2016 13th IEEE International Conference on Solid-State and Integrated Circuit Technology, ICSICT 2016 - Proceedings
SP - 247
EP - 250
BT - 2016 13th IEEE International Conference on Solid-State and Integrated Circuit Technology, ICSICT 2016 - Proceedings
A2 - Jiang, Yu-Long
A2 - Tang, Ting-Ao
A2 - Huang, Ru
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 13th IEEE International Conference on Solid-State and Integrated Circuit Technology, ICSICT 2016
Y2 - 25 October 2016 through 28 October 2016
ER -