VLSI implementation of discrete wavelet transform

A. Grzeszczak, T. H. Yeap, S. Panchanathan

Research output: Contribution to journalConference articlepeer-review


This paper presents a VLSI implementation of Discrete Wavelet Transform (DWT). The architecture is systolic in nature and performs both high-pass and low-pass coefficient calculations with only one set of multipliers. The architecture is simple, modular, and cascadable, and has been implemented in VLSI. Simulation results show that real-time coefficient calculation on a 512 × 512 monochrome video input can be achieved.

Original languageEnglish (US)
Pages (from-to)819-822
Number of pages4
JournalCanadian Conference on Electrical and Computer Engineering
StatePublished - Dec 1 1995
Externally publishedYes
EventProceedings of the 1995 Canadian Conference on Electrical and Computer Engineering. Part 1 (of 2) - Montreal, Can
Duration: Sep 5 1995Sep 8 1995

ASJC Scopus subject areas

  • Hardware and Architecture
  • Electrical and Electronic Engineering


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