Time-predictable computer architecture for cyber-physical systems: Digital emulation of power electronics systems

Michel Kinsy, Omer Khan, Ivan Celanovic, Dusan Majstorovic, Nikola Celanovic, Srinivas Devadas

Research output: Chapter in Book/Report/Conference proceedingConference contribution

18 Scopus citations


The smart grid concept is a good example of a complex cyber-physical system (CPS) that exhibits intricate interplay between control, sensing, and communication infrastructure on one side, and power processing and actuation on the other side. The more extensive use of computation, sensing, and communication, tightly coupled with power processing, calls for a fundamental reassessment of some of the prevailing paradigms in the real-time control and communication abstractions. Today these abstractions are mostly thought of as embedded systems, and the overall framework needs to be reformed in order to fully realize the potential of the emerging field of cyber-physical systems. This paper details the design and application of a new ultrahigh speed real-time emulation platform for Hardware-in-the- Loop (HiL) testing and design of high-power power electronics systems. Our real-time hardware emulation for HiL systems is based on a reconfigurable, heterogeneous, multicore processor architecture that emulates power electronics, and includes a circuit compiler that translates graphic system models into processor executable machine code. We present the hardware architecture, and describe the process of power electronic circuit compilation. This approach yields real-time execution on the order of 1μs simulation time step (including input/output latency) for a broad class of power electronics converters. To the best of our knowledge, no current academic or industrial HiL system has such a fast emulation response time.We present HiL experimental results for three representative systems: a variable speed induction motor drive, a utility grid connected photovoltaic converter system, and a hybrid electric vehicle motor drive.

Original languageEnglish (US)
Title of host publicationProceedings - 2011 32nd IEEE Real-Time Systems Symposium, RTSS 2011
Number of pages12
StatePublished - 2011
Externally publishedYes
Event2011 32nd IEEE Real-Time Systems Symposium, RTSS 2011 - Vienna, Austria
Duration: Nov 29 2011Dec 2 2011

Publication series

NameProceedings - Real-Time Systems Symposium
ISSN (Print)1052-8725


Conference2011 32nd IEEE Real-Time Systems Symposium, RTSS 2011


  • Cyber-physical systems
  • FPGA
  • Hardware-in-the-loop (HiL)
  • Heterogeneous architectures
  • Multicores
  • Network-on-chip
  • Power electronics
  • Switched hybrid automaton

ASJC Scopus subject areas

  • Software
  • Hardware and Architecture
  • Computer Networks and Communications


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