Temperature dependent wire delay estimation in floorplanning

Andreas Thor Winther, Wei Liu, Alberto Nannarelli, Sarma Vrudhula

Research output: Chapter in Book/Report/Conference proceedingConference contribution

6 Scopus citations


Due to large variations in temperature in VLSI circuits and the linear relationship between metal resistance and temperature, the delay through wires of the same length can be different. Traditional thermal aware floorplanning algorithms use wirelength to estimate delay and routability. In this work, we show that using wirelength as the evaluation metric does not always produce a floorplan with the shortest delay. We propose a temperature dependent wire delay estimation method for thermal aware floorplanning algorithms, which takes into account the thermal effect on wire delay. The experiment results show that a shorter delay can be achieved using the proposed method. In addition, we also discuss the congestion and reliability issues as they are closely related to routing and temperature.

Original languageEnglish (US)
Title of host publication2011 NORCHIP
StatePublished - 2011
Event2011 NORCHIP - Lund, Sweden
Duration: Nov 14 2011Nov 15 2011

Publication series

Name2011 NORCHIP


Other2011 NORCHIP

ASJC Scopus subject areas

  • Hardware and Architecture
  • Electrical and Electronic Engineering


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