Simulation of arsenic in situ doping with polysilicon CVD and its application to high aspect ratio trenches

Clemens Heitzinger, Wolfgang Pyka, Naoki Tamaoki, Toshiro Takase, Toshimitsu Ohmine, Siegfried Selberherr

Research output: Contribution to journalArticlepeer-review

1 Scopus citations


Filling high aspect ratio trenches is an essential manufacturing step for state of the art memory cells. Understanding and simulating the transport and surface processes enables to achieve voidless filling of deep trenches, to predict the resulting profiles, and thus to optimize the process parameters and the resulting memory cells. Experiments of arsenic doped polysilicon deposition show that under certain process conditions step coverages greater than unity can be achieved. We developed a new model for the simulation of arsenic doped polysilicon deposition, which takes into account surface coverage dependent sticking coefficients and surface coverage dependent arsenic incorporation and desorption rates. The additional introduction of Langmuir - Hinshelwood type time dependent surface coverage enabled the reproduction of the bottom up filling of the trenches in simulations. Additionally, the rigorous treatment of the time dependent surface coverage allows to trace the in situ doping of the deposited film. The model presented was implemented and simulations were carried out for different process parameters. Very good agreement with experimental data was achieved with theoretically deduced parameters. Simulation results are shown and discussed for polysilicon deposition into 0.1 μm wide and 7 μm deep, high aspect ratio trenches.

Original languageEnglish (US)
Pages (from-to)285-292
Number of pages8
JournalIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Issue number3
StatePublished - Mar 2003
Externally publishedYes


  • Chemical vapor deposition (CVD)
  • In situ doping
  • Memory cells
  • Topography

ASJC Scopus subject areas

  • Software
  • Computer Graphics and Computer-Aided Design
  • Electrical and Electronic Engineering


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