@inproceedings{85d82dcc8ad2447e8b0ed63e078ec435,
title = "Scaling-up resistive synaptic arrays for neuro-inspired architecture: Challenges and prospect",
abstract = "The crossbar array architecture with resistive synaptic devices is attractive for on-chip implementation of weighted sum and weight update in the neuro-inspired learning algorithms. This paper discusses the design challenges on scaling up the array size due to non-ideal device properties and array parasitics. Circuit-level mitigation strategies have been proposed to minimize the learning accuracy loss in a large array. This paper also discusses the peripheral circuits design considerations for the neuro-inspired architecture. Finally, a circuit-level macro simulator is developed to explore the design trade-offs and evaluate the overhead of the proposed mitigation strategies as well as project the scaling trend of the neuro-inspired architecture.",
keywords = "Resistive memory, crossbar array, machine learning, neuromorphic computing, synaptic device",
author = "Shimeng Yu and Chen, {Pai Yu} and Yu Cao and Lixue Xia and Yu Wang and Huaqiang Wu",
note = "Publisher Copyright: {\textcopyright} 2015 IEEE.; 61st IEEE International Electron Devices Meeting, IEDM 2015 ; Conference date: 07-12-2015 Through 09-12-2015",
year = "2015",
month = feb,
day = "16",
doi = "10.1109/IEDM.2015.7409718",
language = "English (US)",
series = "Technical Digest - International Electron Devices Meeting, IEDM",
publisher = "Institute of Electrical and Electronics Engineers Inc.",
pages = "17.3.1--17.3.4",
booktitle = "2015 IEEE International Electron Devices Meeting, IEDM 2015",
}