@article{b6eadbe55b804037b066af1548d891c9,
title = "Scaling theory in modern VLSI: Factors affecting interconnects, wire length, and clock speed",
author = "Ferry, {D. K.} and Akers, {L. A.}",
note = "Funding Information: The authors have benefited from discussions with J.R. Barker and P. Hasler. This work was supported in part by the Defense Advanced Research Projects Agency.",
year = "1997",
month = sep,
doi = "10.1109/101.621606",
language = "English (US)",
volume = "13",
pages = "41--44",
journal = "IEEE Circuits and Devices Magazine",
issn = "8755-3996",
publisher = "Institute of Electrical and Electronics Engineers Inc.",
number = "5",
}