Programming Protocol Optimization for Analog Weight Tuning in Resistive Memories

Ligang Gao, Pai Yu Chen, Shimeng Yu

Research output: Contribution to journalArticlepeer-review

80 Scopus citations


Analog weight tuning in resistive memories is attractive for multilevel operation and neuro-inspired computing. To tune the device conductance to the desired states as fast as possible without sacrificing the accuracy, we propose an optimization programming protocol by adjusting the pulse amplitude incremental steps, the pulsewidth incremental steps, and the start voltages. Our experimental results on HfOx-based resistive memories indicate that avoiding over-reset by appropriate programming parameters is critical for fast convergence of the conductance tuning. The over-reset behavior is caused by the stochastic nature of filament formation and rupture, as simulated by a 1-D filament model.

Original languageEnglish (US)
Article number7275091
Pages (from-to)1157-1159
Number of pages3
JournalIEEE Electron Device Letters
Issue number11
StatePublished - Nov 1 2015


  • RRAM
  • multilevel
  • programming scheme

ASJC Scopus subject areas

  • Electronic, Optical and Magnetic Materials
  • Electrical and Electronic Engineering


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