PreNoc: Neural network based predictive routing for network-on-chip architectures

Michel A. Kinsy, Shreeya Khadka, Mihailo Isakov

Research output: Chapter in Book/Report/Conference proceedingConference contribution

14 Scopus citations


In this paper, we introduce a neural network based predictive routing algorithm for on-chip networks which uses anticipated global network state and congestion information to efficiently route network traffic. The core of the algorithm is a multi-layer neural network machine learning approach where the inputs are level of occupancy of virtual channels, average latency for a particular router to be selected for route computation, the probability of virtual channel allocation, and the probability of winning switch arbitration at the crossbar. The algorithm lends itself to both node routing and source routing. To evaluate the PreNoc routing algorithm, we simulate both synthetic traffic and real application traces using a cycle-accurate simulator. In most test cases, the proposed approach outperforms current deterministic and adaptive routing techniques in terms of latency and throughput. The hardware overhead for supporting the new routing algorithm is minimal.

Original languageEnglish (US)
Title of host publicationGLSVLSI 2017 - Proceedings of the Great Lakes Symposium on VLSI 2017
PublisherAssociation for Computing Machinery
Number of pages6
ISBN (Electronic)9781450349727
StatePublished - May 10 2017
Externally publishedYes
Event27th Great Lakes Symposium on VLSI, GLSVLSI 2017 - Banff, Canada
Duration: May 10 2017May 12 2017

Publication series

NameProceedings of the ACM Great Lakes Symposium on VLSI, GLSVLSI
VolumePart F127756


Other27th Great Lakes Symposium on VLSI, GLSVLSI 2017


  • Adaptive routing
  • Artificial neural network
  • Network on chip
  • NoC
  • Predictive routing

ASJC Scopus subject areas

  • Engineering(all)


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