On loop formulas with variables

Joohyung Lee, Yunsong Meng

Research output: Chapter in Book/Report/Conference proceedingConference contribution

21 Scopus citations


Recently Ferraris, Lee and Lifschitz proposed a new definition of stable models that does not refer to grounding, which applies to the syntax of arbitrary first-order sentences. We show its relation to the idea of loop formulas with variables by Chen, Lin, Wang and Zhang, and generalize their loop formulas to disjunctive programs and to arbitrary first-order sentences. We also extend the syntax of logic programs to allow explicit quantifiers, and define its semantics as a subclass of the new language of stable models by Ferraris et al. Such programs inherit from the general language the ability to handle nonmonotonic reasoning under the stable model semantics even in the absence of the unique name and the domain closure assumptions, while yielding more succinct loop formulas than the general language due to the restricted syntax. We also show certain syntactic conditions under which query answering for an extended program can be reduced to entailment checking in first-order logic, providing a way to apply first-order theorem provers to reasoning about non-Herbrand stable models.

Original languageEnglish (US)
Title of host publicationPrinciples of Knowledge Representation and Reasoning
Subtitle of host publicationProceedings of the 11th International Conference, KR 2008
PublisherInstitute of Electrical and Electronics Engineers Inc.
Number of pages10
ISBN (Print)9781577353843
StatePublished - 2008
Event11th International Conference on Principles of Knowledge Representation and Reasoning, KR 2008 - Sydney, NSW, Australia
Duration: Sep 16 2008Sep 19 2008

Publication series

NameProceedings of the International Conference on Knowledge Representation and Reasoning
ISSN (Print)2334-1025
ISSN (Electronic)2334-1033


Other11th International Conference on Principles of Knowledge Representation and Reasoning, KR 2008
CitySydney, NSW

ASJC Scopus subject areas

  • Logic


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