Multi-module multi-port memory design for low power embedded systems

Wen Tsong Shiue, Chaitali Chakrabarti

Research output: Contribution to journalArticlepeer-review

8 Scopus citations


In this paper we describe a multi-module, multi-port memory design procedure that satisfies area and/or energy constraints for embedded applications. Our procedure consists of application of loop transformations and reordering of array accesses to reduce the memory bandwidth followed by memory allocation and assignment procedures based on ILP models and heuristic-based algorithms. The specific problems include determination of (a) the memory configuration with minimum area, given the energy bound, (b) the memory configuration with minimum energy, given the area bound, (c) array allocation such that the energy consumption is minimum for a given memory configuration (number of modules, size and number of ports per module). The results obtained by the heuristics match well with those obtained by the ILP methods.

Original languageEnglish (US)
Pages (from-to)235-261
Number of pages27
JournalDesign Automation for Embedded Systems
Issue number4
StatePublished - Jul 2005


  • ILP models
  • Memory allocation and assignment
  • Multi-module memory
  • Multi-port memory

ASJC Scopus subject areas

  • Software
  • Hardware and Architecture


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