Abstract
Misalignment tolerance can be achieved in the 100-nm T-gate recessed-channel Si nMOSFET. The T-shaped gate accommodates channel-to-gate misalignment. Source/drain (S/D) implantation must be performed before gate patterning to achieve misalignment tolerance. The pregate implantation dose required for misalignment tolerance is ∼ 20% of the total S/D dose, so lightly-doped drain can be maintained in this device.
Original language | English (US) |
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Pages (from-to) | 2951-2953 |
Number of pages | 3 |
Journal | IEEE Transactions on Electron Devices |
Volume | 48 |
Issue number | 12 |
DOIs | |
State | Published - Dec 2001 |
Externally published | Yes |
Keywords
- CMOSFETs
- MOSFETs
- Semiconductor device modeling
- Silicon
ASJC Scopus subject areas
- Electronic, Optical and Magnetic Materials
- Electrical and Electronic Engineering