TY - GEN
T1 - In situ delay-slack monitor for high-performance processors using an all-digital self-calibrating 5ps resolution time-to-digital converter
AU - Fick, David
AU - Liu, Nurrachman
AU - Foo, Zhiyoong
AU - Fojtik, Matthew
AU - Seo, Jae Sun
AU - Sylvester, Dennis
AU - Blaauw, David
PY - 2010/5/18
Y1 - 2010/5/18
N2 - Advanced CMOS technologies have become highly susceptible to process, voltage, and temperature (PVT) variation. The standard approach for addressing this issue is to increase timing margin at the expense of power and performance. One approach to reclaim these losses relies on canary circuits [1] or sensors [2], which are simple to implement but cannot account for local variations. A more recent approach, called Razor, uses delay speculation coupled with error detection and correction to remove all margins but also imposes significant design complexity [3]. In this paper, we present a minimally-invasive in situdelay slack monitor that directly measures the timing margins on critical timing signals, allowing margins due to both global and local PVT variations to be removed.
AB - Advanced CMOS technologies have become highly susceptible to process, voltage, and temperature (PVT) variation. The standard approach for addressing this issue is to increase timing margin at the expense of power and performance. One approach to reclaim these losses relies on canary circuits [1] or sensors [2], which are simple to implement but cannot account for local variations. A more recent approach, called Razor, uses delay speculation coupled with error detection and correction to remove all margins but also imposes significant design complexity [3]. In this paper, we present a minimally-invasive in situdelay slack monitor that directly measures the timing margins on critical timing signals, allowing margins due to both global and local PVT variations to be removed.
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U2 - 10.1109/ISSCC.2010.5433996
DO - 10.1109/ISSCC.2010.5433996
M3 - Conference contribution
AN - SCOPUS:77952234485
SN - 9781424460342
T3 - Digest of Technical Papers - IEEE International Solid-State Circuits Conference
SP - 188
EP - 189
BT - 2010 IEEE International Solid-State Circuits Conference, ISSCC 2010 - Digest of Technical Papers
T2 - 2010 IEEE International Solid-State Circuits Conference, ISSCC 2010
Y2 - 7 February 2010 through 11 February 2010
ER -