Impact of cell failure on reliable cross-point resistive memory design

Cong Xu, Dimin Niu, Yang Zheng, Shimeng Yu, Yuan Xie

Research output: Contribution to journalArticlepeer-review

15 Scopus citations


Resistive random access memory (ReRAM) technology is an emerging candidate for next-generation nonvolatile memory (NVM) architecture due to its simple structure, low programming voltage, fast switching speed, high on/off ratio, excellent scalability, good endurance, and great compatibility with silicon CMOS technology. The most attractive of the characteristics of ReRAM is its cross-point structure, which features a 4F2 cell size. In a cross-point structure, the existence of sneak current and resulting voltage loss due to the wire's resistance might cause read and write failures if not designed properly. In addition, a robust ReRAM design needs to deal with both soft and hard errors. In this article, we summarize mechanisms of both soft and hard errors of ReRAM cells and propose a unified model to characterize different failure behaviors. We quantitatively analyze the impact of cell failure types on the reliability of the cross-point array. We also propose an error-resilient architecture, which avoids unnecessary writes in the hard error detection unit. Assuming constant soft error rate, our approach can extend the lifetime of ReRAM up to 75% over a design without hard error detection and up to 12% over the design with a "write-verify" detection mechanism. Our approach yields greater significant lifetime improvement when considering postcycling retention degradation.

Original languageEnglish (US)
Article numberA63
JournalACM Transactions on Design Automation of Electronic Systems
Issue number4
StatePublished - Sep 1 2015


  • Cross-point structure
  • Endurance failure
  • Resistive memory
  • Soft error

ASJC Scopus subject areas

  • Computer Science Applications
  • Computer Graphics and Computer-Aided Design
  • Electrical and Electronic Engineering


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