Image processing using approximate datapath units

Madhu Vasudevan, Chaitali Chakrabarti

Research output: Chapter in Book/Report/Conference proceedingConference contribution

8 Scopus citations


In this paper we present approximate adders and multipliers to reduce the datapath complexity of image processing systems with only a small degradation in PSNR performance. We build upon the approximate circuits proposed in [8] and [9]. We show that selective application of accurate and approximate adders can significantly improve the accuracy of a 2D DCT system. For instance, our implementation of 2D DCT has comparable PSNR performance compared to [8] with 34-50% reduction in area. We also propose an approximate multiplier where the partial products have varying degrees of approximation. Such a multiplier helps improve the accuracy of the system as demonstrated through FFT and Gaussian filter case studies.

Original languageEnglish (US)
Title of host publication2014 IEEE International Symposium on Circuits and Systems, ISCAS 2014
PublisherInstitute of Electrical and Electronics Engineers Inc.
Number of pages4
ISBN (Print)9781479934324
StatePublished - 2014
Event2014 IEEE International Symposium on Circuits and Systems, ISCAS 2014 - Melbourne, VIC, Australia
Duration: Jun 1 2014Jun 5 2014

Publication series

NameProceedings - IEEE International Symposium on Circuits and Systems
ISSN (Print)0271-4310


Other2014 IEEE International Symposium on Circuits and Systems, ISCAS 2014
CityMelbourne, VIC


  • Approximate adders
  • approximate multipliers
  • image processing

ASJC Scopus subject areas

  • Electrical and Electronic Engineering


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