III-V/silicon solar cells which have an active silicon bottom solar cell are promising for multi-junction solar cell applications. In such solar cell structures, a high minority carrier lifetime in the bulk silicon substrate is necessary. Annealing silicon wafers at high temperature (> 500oC) in the molecular beam epitaxy (MBE) high-vacuum chamber revealed significant lifetime degradation. In this work, we developed a practical method to maintain high Si bulk lifetime. SiNx layer deposited on Si back side helps maintain millisecond level minority carrier lifetime. By this procedure high minority carrier lifetime in the Si substrate is preserved while high quality thin GaP layer is achieved. We demonstrate GaP as a hetero-emitter layer with high Si bulk lifetime in GaP/Si structure solar cell with 524mV open circuit voltage.

Original languageEnglish (US)
Title of host publication2016 IEEE 43rd Photovoltaic Specialists Conference, PVSC 2016
PublisherInstitute of Electrical and Electronics Engineers Inc.
Number of pages4
ISBN (Electronic)9781509027248
StatePublished - Nov 18 2016
Event43rd IEEE Photovoltaic Specialists Conference, PVSC 2016 - Portland, United States
Duration: Jun 5 2016Jun 10 2016

Publication series

NameConference Record of the IEEE Photovoltaic Specialists Conference
ISSN (Print)0160-8371


Other43rd IEEE Photovoltaic Specialists Conference, PVSC 2016
Country/TerritoryUnited States


  • Gallium Phosphide
  • MBE growth
  • SiN
  • annealing
  • hetero-emitter
  • minority carrier lifetime
  • silicon substrate

ASJC Scopus subject areas

  • Control and Systems Engineering
  • Industrial and Manufacturing Engineering
  • Electrical and Electronic Engineering


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