TY - JOUR
T1 - Effect of anneal time on the enhanced performance of a-Si:H TFTs for future display technology
AU - Indluru, A.
AU - Venugopal, S. M.
AU - Allee, David
AU - Alford, Terry
N1 - Funding Information:
Manuscript received March 29, 2010; revised July 26, 2010; accepted July 27, 2010. Date of publication August 30, 2010; date of current version April 27, 2011. This work was supported in part by National Science Foundation under L. Hess, Grant DMR-0902277, and in part by the Army Research Laboratory (ARL) and was accomplished under Cooperative Agreement W911NG-04-2-0005.
PY - 2011
Y1 - 2011
N2 - Hydrogenated amorphous silicon (a-Si:H) thin-film transistors (TFTs) are widely used as controlling devices for picture pixels in liquid crystal displays. In addition to flat panel display applications, a significant research effort focuses on the extension of this technology to circuitry on flexible substrates to build flexible sensor systems. This study investigates the effect of anneal time on the performance of the a-Si:H TFTs on Polyethylene naphthalate (PEN). Off-current is reduced by two orders of magnitude for 48-hours annealed TFT, and the sub-threshold slope become steeper with longer annealing. For positive gate-bias-stress, ΔVt values are positive and exhibit a power-law time dependence (PLTD). The 48-hour annealed TFTs, however, display a turnaround phenomenon (TP) at longer stress times. For negative gate-bias-stress, TFTs annealed for ≥ 24 hours possess a smaller positive ΔVt. They do not follow a PLTD and the TP is observed at longer stress times. The observed ΔVt is explained in terms of the shift in the electron and hole transfer characteristics.
AB - Hydrogenated amorphous silicon (a-Si:H) thin-film transistors (TFTs) are widely used as controlling devices for picture pixels in liquid crystal displays. In addition to flat panel display applications, a significant research effort focuses on the extension of this technology to circuitry on flexible substrates to build flexible sensor systems. This study investigates the effect of anneal time on the performance of the a-Si:H TFTs on Polyethylene naphthalate (PEN). Off-current is reduced by two orders of magnitude for 48-hours annealed TFT, and the sub-threshold slope become steeper with longer annealing. For positive gate-bias-stress, ΔVt values are positive and exhibit a power-law time dependence (PLTD). The 48-hour annealed TFTs, however, display a turnaround phenomenon (TP) at longer stress times. For negative gate-bias-stress, TFTs annealed for ≥ 24 hours possess a smaller positive ΔVt. They do not follow a PLTD and the TP is observed at longer stress times. The observed ΔVt is explained in terms of the shift in the electron and hole transfer characteristics.
KW - Flexible electronics
KW - low temperature annealing
KW - thin-film transistors (TFTs)
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U2 - 10.1109/JDT.2010.2063695
DO - 10.1109/JDT.2010.2063695
M3 - Article
AN - SCOPUS:79955613242
SN - 1551-319X
VL - 7
SP - 306
EP - 310
JO - IEEE/OSA Journal of Display Technology
JF - IEEE/OSA Journal of Display Technology
IS - 6
M1 - 5559345
ER -