TY - JOUR
T1 - ECG Authentication Hardware Design with Low-Power Signal Processing and Neural Network Optimization with Low Precision and Structured Compression
AU - Cherupally, Sai Kiran
AU - Yin, Shihui
AU - Kadetotad, Deepak
AU - Srivastava, Gaurav
AU - Bae, Chisung
AU - Kim, Sang Joon
AU - Seo, Jae Sun
N1 - Funding Information:
Manuscript received August 23, 2019; revised October 23, 2019, December 10, 2019, and January 6, 2020; accepted January 18, 2020. Date of publication February 17, 2020; date of current version March 27, 2020. This work was supported in part by the NSF under Grant 1652866, Samsung Advanced Institute of Technology, and in part by the C-BRIC, one of six centers in JUMP, an SRC program sponsored by DARPA. This paper was recommended by Associate Editor Prof. J. Zhou. (Corresponding author: Sai Kiran Cherupally.) Sai Kiran Cherupally, Shihui Yin, Deepak Kadetotad, Gaurav Srivastava, and Jae-sun Seo are with the School of Electrical, Computer and Energy Engineering, Arizona State University, Tempe, AZ 85281, USA (e-mail: [email protected]; [email protected]; [email protected]; [email protected]; [email protected]).
Publisher Copyright:
© 2007-2012 IEEE.
PY - 2020/4
Y1 - 2020/4
N2 - Biometrics such as facial features, fingerprint, and iris are being used increasingly in modern authentication systems. These methods are now popular and have found their way into many portable electronics such as smartphones, tablets, and laptops. Furthermore, the use of biometrics enables secure access to private medical data, now collected in wearable devices such as smartwatches. In this work, we present an accurate low-power device authentication system that employs electrocardiogram (ECG) signals as the biometric modality. The proposed ECG processor consists of front-end signal processing of ECG signals and back-end neural networks (NNs) for accurate authentication. The NNs are trained using a cost function that minimizes intra-individual distance over time and maximizes inter-individual distance. Efficient low-power hardware was implemented by using fixed coefficients for ECG signal pre-processing and by using joint optimization of low-precision and structured sparsity for the NNs. We implemented two instances of ECG authentication hardware with 4X and 8X structurally-compressed NNs in 65 nm LP CMOS, which consume low power of 62.37 μW and 75.41 μW for real-time ECG authentication with a low equal error rate of 1.36% and 1.21%, respectively, for a large 741-subject in-house ECG database. The hardware was evaluated at 10 kHz clock frequency and 1.2 V voltage supply.
AB - Biometrics such as facial features, fingerprint, and iris are being used increasingly in modern authentication systems. These methods are now popular and have found their way into many portable electronics such as smartphones, tablets, and laptops. Furthermore, the use of biometrics enables secure access to private medical data, now collected in wearable devices such as smartwatches. In this work, we present an accurate low-power device authentication system that employs electrocardiogram (ECG) signals as the biometric modality. The proposed ECG processor consists of front-end signal processing of ECG signals and back-end neural networks (NNs) for accurate authentication. The NNs are trained using a cost function that minimizes intra-individual distance over time and maximizes inter-individual distance. Efficient low-power hardware was implemented by using fixed coefficients for ECG signal pre-processing and by using joint optimization of low-precision and structured sparsity for the NNs. We implemented two instances of ECG authentication hardware with 4X and 8X structurally-compressed NNs in 65 nm LP CMOS, which consume low power of 62.37 μW and 75.41 μW for real-time ECG authentication with a low equal error rate of 1.36% and 1.21%, respectively, for a large 741-subject in-house ECG database. The hardware was evaluated at 10 kHz clock frequency and 1.2 V voltage supply.
KW - DNN compression
KW - ECG authentication
KW - fixed-coefficient filtering
KW - neural network optimization
KW - structured sparsity
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U2 - 10.1109/TBCAS.2020.2974387
DO - 10.1109/TBCAS.2020.2974387
M3 - Article
C2 - 32078561
AN - SCOPUS:85082634860
SN - 1932-4545
VL - 14
SP - 198
EP - 208
JO - IEEE transactions on biomedical circuits and systems
JF - IEEE transactions on biomedical circuits and systems
IS - 2
M1 - 9000713
ER -