TY - GEN
T1 - Closed-loop nonlinear modeling of =Δ fractional-N frequency synthesizers
AU - Hedayati, H.
AU - Bakkaloglu, B.
N1 - Publisher Copyright:
© 2007 IEEE.
PY - 2017/7/2
Y1 - 2017/7/2
N2 - Nonlinear, time-varying nature of synthesizer building blocks such as phase frequency detectors (PFD), charge pump and frequency dividers can increase close-in phase noise and enhance spurious tones due to intermodulation of high frequency quantization noise and tonal content; therefore, an accurate simulation model is critical for successful implementation of loop parameters and bandwidth widening techniques. In this paper inherent non-uniform sampling of the PFD is modeled through an event-driven dual-iteration based technique. The proposed technique generates a vector of piece-wise linear time-voltage pairs, defining the VCO control voltage. A flexible third-order Δ modulated RF synthesizer core with integrated loop filter and LC-tank VCO is designed and fabricated in 0.13-μm CMOS process in order to validate the technique experimentally. The proposed modeling technique was able to predict in-band spur power levels with 1.8 dB accuracy, and spur frequency offsets with lower than 400Hz accuracy with several programmable non-idealities enabled.
AB - Nonlinear, time-varying nature of synthesizer building blocks such as phase frequency detectors (PFD), charge pump and frequency dividers can increase close-in phase noise and enhance spurious tones due to intermodulation of high frequency quantization noise and tonal content; therefore, an accurate simulation model is critical for successful implementation of loop parameters and bandwidth widening techniques. In this paper inherent non-uniform sampling of the PFD is modeled through an event-driven dual-iteration based technique. The proposed technique generates a vector of piece-wise linear time-voltage pairs, defining the VCO control voltage. A flexible third-order Δ modulated RF synthesizer core with integrated loop filter and LC-tank VCO is designed and fabricated in 0.13-μm CMOS process in order to validate the technique experimentally. The proposed modeling technique was able to predict in-band spur power levels with 1.8 dB accuracy, and spur frequency offsets with lower than 400Hz accuracy with several programmable non-idealities enabled.
KW - Fractional-N frequency synthesizers
KW - Phase noise
KW - Quantization noise
KW - Sigma-delta modulation
KW - Spurs
UR - http://www.scopus.com/inward/record.url?scp=85049997479&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=85049997479&partnerID=8YFLogxK
U2 - 10.1109/ARFTG.2007.8376229
DO - 10.1109/ARFTG.2007.8376229
M3 - Conference contribution
AN - SCOPUS:85049997479
T3 - 2007 70th ARFTG Microwave Measurement Conference: High Power RF Measurement Techniques, ARFTG 2007
SP - 1
EP - 4
BT - 2007 70th ARFTG Microwave Measurement Conference
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 70th ARFTG Microwave Measurement Conference, ARFTG 2007
Y2 - 29 November 2007 through 30 November 2007
ER -