TY - GEN
T1 - Cases for analog mixed signal computing integrated circuits for deep neural networks
AU - Seok, Mingoo
AU - Yang, Minhao
AU - Jiang, Zhewei
AU - Lazar, Aurel A.
AU - Seo, Jae Sun
N1 - Funding Information:
Swiss National Science Foundation, Columbia University Research Initiatives in Science and Engineering, and Wei Family Private Foundation, in part supports the works in this paper.
Publisher Copyright:
© 2019 IEEE.
PY - 2019/4
Y1 - 2019/4
N2 - Computing technology has been a backbone of our society. Its importance is hard to overemphasize. Today, we again confirm its extreme importance with recent advances in deep neural networks. Those emerging workloads impose an unprecedented amount of arithmetic complexity and data access beyond our existing computing systems can barely handle. Particularly, mobile and embedded computing systems will face a major challenge in achieving energy-efficient computing for truly enabling intelligent systems. In this talk, we will discuss the emerging analog and mixed-signal circuit techniques to improve energy efficiency. We will discuss two recent cases using such techniques, one on the speech recognition processor in hybrid analog and digital circuits and the other on the embedded SRAM circuits that support analog-mixed-signal in-memory (in-bitcell) computing for convolutional and deep neural networks.
AB - Computing technology has been a backbone of our society. Its importance is hard to overemphasize. Today, we again confirm its extreme importance with recent advances in deep neural networks. Those emerging workloads impose an unprecedented amount of arithmetic complexity and data access beyond our existing computing systems can barely handle. Particularly, mobile and embedded computing systems will face a major challenge in achieving energy-efficient computing for truly enabling intelligent systems. In this talk, we will discuss the emerging analog and mixed-signal circuit techniques to improve energy efficiency. We will discuss two recent cases using such techniques, one on the speech recognition processor in hybrid analog and digital circuits and the other on the embedded SRAM circuits that support analog-mixed-signal in-memory (in-bitcell) computing for convolutional and deep neural networks.
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U2 - 10.1109/VLSI-DAT.2019.8742044
DO - 10.1109/VLSI-DAT.2019.8742044
M3 - Conference contribution
AN - SCOPUS:85068592255
T3 - 2019 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2019
BT - 2019 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2019
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 2019 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2019
Y2 - 22 April 2019 through 25 April 2019
ER -