Benchmarking Heterogeneous Integration with 2.5D/3D Interconnect Modeling

Current monolithic designs face significant challenges in terms of silicon area, fabrication cost, and data movement especially when dealing with increasingly complex and diverse AI models. With advanced packaging, 2.5D and 3D interconnection today provide high bandwidth and high channel density that are comparable to on-chip interconnect, inspiring new architectures and design paradigms for future AI hardware. In this work, we propose HISIM, a benchmarking tool for chiplet-based heterogeneous integration (HI), that evaluates the performance of monolithic, 2.5D, and 3D systems. HISIM emphasizes the hierarchical interconnection and associated data movement in the HI system. It integrates the technology roadmap of 2.5D/3D wires, conducts electrical modeling and analysis, and performs cycle-accurate simulations of data movement. Combined with the performance model of various types of computing elements, HISIM provides a flexible and efficient platform for HI system mapping. We demonstrate the applicability of HISIM on DNNs, transformers, and graph neural networks, to illustrate tradeoffs in placement/routing methods and power distribution. Besides, we propose the co-design of AI placement and frequency tuning under thermal constraints. Our results highlight the advantages of 3D interconnect in HI system performance and the emerging limitation of power dissipation.