Abstract
Analysis of CMOS direct conversion architecture with adaptive DC offset compensation is presented. Due to process mismatches and local oscillator (LO) crosstalk, DC offsets up to 30 mV are observed at the mixer output. For a practical direct conversion or zero-if down-conversion system, the incoming RF signal can be as low as -100 dBm or few microvolts at this stage and any LO coupling will cause a DC offset orders of magnitude larger than the received signal. The DC offset needs to be effectively reduced to prevent the consecutive gain stages from entering saturation and destroying the RF signal. To achieve this, an adaptive DC shifting circuit is presented. Adding a tunable DC offset on the LO signal can effectively counteract the output DC offset by exploiting the quadratic LO dependence of the process mismatch induced offsets. In addition to that, DSP approaches for adaptively generating the control signals for the DC shifting circuitry are investigated.
| Original language | English (US) |
|---|---|
| Title of host publication | Proceedings of the IEEE Great Lakes Symposium on VLSI |
| Editors | M.A. Bayoumi, G. Jullien |
| Publisher | IEEE Comp Soc |
| Pages | 118-121 |
| Number of pages | 4 |
| State | Published - 1998 |
| Externally published | Yes |
| Event | Proceedings of the 1998 8th Great Lakes Symposium on VLSI - Lafayette, LA, USA Duration: Feb 19 1998 → Feb 21 1998 |
Other
| Other | Proceedings of the 1998 8th Great Lakes Symposium on VLSI |
|---|---|
| City | Lafayette, LA, USA |
| Period | 2/19/98 → 2/21/98 |
ASJC Scopus subject areas
- Electrical and Electronic Engineering