Analysis of adaptive CMOS down conversion mixers

Can K. Sandalci, Sayfe Kiaei

Research output: Chapter in Book/Report/Conference proceedingConference contribution

3 Scopus citations


Analysis of CMOS direct conversion architecture with adaptive DC offset compensation is presented. Due to process mismatches and local oscillator (LO) crosstalk, DC offsets up to 30 mV are observed at the mixer output. For a practical direct conversion or zero-if down-conversion system, the incoming RF signal can be as low as -100 dBm or few microvolts at this stage and any LO coupling will cause a DC offset orders of magnitude larger than the received signal. The DC offset needs to be effectively reduced to prevent the consecutive gain stages from entering saturation and destroying the RF signal. To achieve this, an adaptive DC shifting circuit is presented. Adding a tunable DC offset on the LO signal can effectively counteract the output DC offset by exploiting the quadratic LO dependence of the process mismatch induced offsets. In addition to that, DSP approaches for adaptively generating the control signals for the DC shifting circuitry are investigated.

Original languageEnglish (US)
Title of host publicationProceedings of the IEEE Great Lakes Symposium on VLSI
EditorsM.A. Bayoumi, G. Jullien
PublisherIEEE Comp Soc
Number of pages4
StatePublished - 1998
Externally publishedYes
EventProceedings of the 1998 8th Great Lakes Symposium on VLSI - Lafayette, LA, USA
Duration: Feb 19 1998Feb 21 1998


OtherProceedings of the 1998 8th Great Lakes Symposium on VLSI
CityLafayette, LA, USA

ASJC Scopus subject areas

  • Electrical and Electronic Engineering


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