Analog implementation of a 'neural' optimization network

M. T. Musavi, A. Roy

Research output: Contribution to journalConference articlepeer-review


An analog implementation of a neural network has been developed. The circuit is constructed of discrete analog devices. It utilizes a neuron model with graded response property to solve optimization problems. The neuron, which has symmetric synaptic connections, is based on the Hopfield model. The model uses the collective computation properties of analog processor networks. The architecture of the electronic circuitry consists of a highly interconnected network of processing elements, where each processing element is an amplifier to model the firing of a neuron and has an inverted and non-inverted output to enable both excitary and inhibitory connections. The interconnection is of resistive nature.

Original languageEnglish (US)
Pages (from-to)395
Number of pages1
JournalNeural Networks
Issue number1 SUPPL
StatePublished - 1988
Externally publishedYes
EventInternational Neural Network Society 1988 First Annual Meeting - Boston, MA, USA
Duration: Sep 6 1988Sep 10 1988

ASJC Scopus subject areas

  • Cognitive Neuroscience
  • Artificial Intelligence


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