Abstract
This paper describes the design of amorphous silicon (a-Si:H) logic circuits using static and dynamic programmable logic arrays (PLA's) as the baseline examples. The PLA's are designed with n-channel a-Si:H thin film transistors (TFT's) manufactured in a low temperature (180°C) process for flexible substrates. Measured and simulated results demonstrate that dynamic circuits are the best design approach, from both a power and delay viewpoint, for a-Si:H flexible logic circuits.
Original language | English (US) |
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Title of host publication | Proceedings of the Custom Integrated Circuits Conference |
Pages | 181-184 |
Number of pages | 4 |
DOIs | |
State | Published - 2008 |
Event | IEEE 2008 Custom Integrated Circuits Conference, CICC 2008 - San Jose, CA, United States Duration: Sep 21 2008 → Sep 24 2008 |
Other
Other | IEEE 2008 Custom Integrated Circuits Conference, CICC 2008 |
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Country/Territory | United States |
City | San Jose, CA |
Period | 9/21/08 → 9/24/08 |
Keywords
- a-Si:H TFT
- Combinational logic
- Flexible electronics
- Threshold voltage degradation
ASJC Scopus subject areas
- Electrical and Electronic Engineering