TY - GEN
T1 - Algorithms for scheduling task-based applications onto heterogeneous many-core architectures
AU - Kinsy, Michel A.
AU - Devadas, Srinivas
N1 - Publisher Copyright:
© 2014 IEEE.
PY - 2014/2/11
Y1 - 2014/2/11
N2 - In this paper we present an Integer Linear Programming (ILP) formulation and two non-iterative heuristics for scheduling a task-based application onto a heterogeneous many-core architecture. Our ILP formulation is able to handle different application performance targets, e.g., low execution time, low memory miss rate, and different architectural features, e.g., cache sizes. For large size problem where the ILP convergence time may be too long, we propose a simple mapping algorithm which tries to spread tasks onto as many processing units as possible, and a more elaborate heuristic that shows good mapping performance when compared to the ILP formulation. We use two realistic power electronics applications to evaluate our mapping techniques on full RTL many-core systems consisting of eight different types of processor cores.
AB - In this paper we present an Integer Linear Programming (ILP) formulation and two non-iterative heuristics for scheduling a task-based application onto a heterogeneous many-core architecture. Our ILP formulation is able to handle different application performance targets, e.g., low execution time, low memory miss rate, and different architectural features, e.g., cache sizes. For large size problem where the ILP convergence time may be too long, we propose a simple mapping algorithm which tries to spread tasks onto as many processing units as possible, and a more elaborate heuristic that shows good mapping performance when compared to the ILP formulation. We use two realistic power electronics applications to evaluate our mapping techniques on full RTL many-core systems consisting of eight different types of processor cores.
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U2 - 10.1109/HPEC.2014.7040977
DO - 10.1109/HPEC.2014.7040977
M3 - Conference contribution
AN - SCOPUS:84946692270
T3 - 2014 IEEE High Performance Extreme Computing Conference, HPEC 2014
BT - 2014 IEEE High Performance Extreme Computing Conference, HPEC 2014
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 2014 IEEE High Performance Extreme Computing Conference, HPEC 2014
Y2 - 9 September 2014 through 11 September 2014
ER -