@inproceedings{32d3d70e5cb34c3cb4da4f4be3b99b2f,
title = "A survey on hardware security techniques targeting low-power SoC designs",
abstract = "In this work, we survey hardware-based security techniques applicable to low-power system-on-chip designs. Techniques related to a system's processing elements, volatile main memory and caches, non-volatile memory and on-chip interconnects are examined. Threat models for each subsystem and technique are considered. Performance overheads and other trade-offs for each technique are discussed. Defenses with similar threat models are compared.",
keywords = "Hardware Security, Network-on-chip, Oblivious RAM, PUF, Secure Enclave, System-on-Chip",
author = "Alan Ehret and Karen Gettings and Jordan, {Bruce R.} and Kinsy, {Michel A.}",
note = "Funding Information: DISTRIBUTION STATEMENT A. Approved for public release. Distribution is unlimited. This material is based upon work supported by the Under Secretary of Defense for Research and Engineering under Air Force Contract No. FA8702-15-D-0001. Any opinions, findings, conclusions or recommendations expressed in this material are those of the author(s) and do not necessarily reflect the views of the Under Secretary of Defense for Research and Engineering. Publisher Copyright: {\textcopyright} 2019 IEEE.; 2019 IEEE High Performance Extreme Computing Conference, HPEC 2019 ; Conference date: 24-09-2019 Through 26-09-2019",
year = "2019",
month = sep,
doi = "10.1109/HPEC.2019.8916486",
language = "English (US)",
series = "2019 IEEE High Performance Extreme Computing Conference, HPEC 2019",
publisher = "Institute of Electrical and Electronics Engineers Inc.",
booktitle = "2019 IEEE High Performance Extreme Computing Conference, HPEC 2019",
}