TY - GEN
T1 - A self-calibrated on-chip phase-noise-measurement circuit with -75dBc single-tone sensitivity at 100kHz offset
AU - Khalil, Waleed
AU - Bakkaloglu, Bertan
AU - Klaei, Sayfe
PY - 2007
Y1 - 2007
N2 - An on-chip phase-noise-measurement circuit with single-tone measurement sensitivity of -75dBc at 100kHz offset from carrier is presented. The circuit uses a delay-line and mixer frequency discriminator and can operate up to 2GHz input frequency. This module does not rely on a reference clock and, with on-line self calibration, its accuracy is stabilized across gate-delay variations.
AB - An on-chip phase-noise-measurement circuit with single-tone measurement sensitivity of -75dBc at 100kHz offset from carrier is presented. The circuit uses a delay-line and mixer frequency discriminator and can operate up to 2GHz input frequency. This module does not rely on a reference clock and, with on-line self calibration, its accuracy is stabilized across gate-delay variations.
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U2 - 10.1109/ISSCC.2007.373536
DO - 10.1109/ISSCC.2007.373536
M3 - Conference contribution
AN - SCOPUS:34548815414
SN - 1424408539
SN - 9781424408535
T3 - Digest of Technical Papers - IEEE International Solid-State Circuits Conference
SP - 546
EP - 621
BT - 2007 IEEE International Solid-State Circuits Conference, ISSCC - Digest of Technical Papers
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 54th IEEE International Solid-State Circuits Conference, ISSCC 2007
Y2 - 11 February 2007 through 15 February 2007
ER -