TY - GEN
T1 - A methodology for characterization of large macro cells and IP blocks considering process variations
AU - Goel, Amit
AU - Vrudhula, Sarma
AU - Taraporevala, Feroze
AU - Ghanta, Praveen
PY - 2008/8/25
Y1 - 2008/8/25
N2 - Integrated circuits today rely on extensive re-use of pre-characterized IP bocks and macro cells to meet the demand for high performance system on chip (SoC). In this paper we propose a methodology for characterization of IP blocks and macro cells for statistical timing analysis considering process variations and spatial correlations. We develop efficient models for capturing both inter-die and intra-die variations in devices and interconnects. Increasing variability of the process parameters in sub-nanometer designs requires instance-specific characterization of these design blocks. We propose a technique for instance-specific calibration of pre-characterized timing model. The proposed approach was evaluated on large industrial designs of 1.2M and 3.5M gates in 65nm technology and validated against SPICE for accuracy.
AB - Integrated circuits today rely on extensive re-use of pre-characterized IP bocks and macro cells to meet the demand for high performance system on chip (SoC). In this paper we propose a methodology for characterization of IP blocks and macro cells for statistical timing analysis considering process variations and spatial correlations. We develop efficient models for capturing both inter-die and intra-die variations in devices and interconnects. Increasing variability of the process parameters in sub-nanometer designs requires instance-specific characterization of these design blocks. We propose a technique for instance-specific calibration of pre-characterized timing model. The proposed approach was evaluated on large industrial designs of 1.2M and 3.5M gates in 65nm technology and validated against SPICE for accuracy.
UR - http://www.scopus.com/inward/record.url?scp=49749125059&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=49749125059&partnerID=8YFLogxK
U2 - 10.1109/ISQED.2008.4479726
DO - 10.1109/ISQED.2008.4479726
M3 - Conference contribution
AN - SCOPUS:49749125059
SN - 0769531172
SN - 9780769531175
T3 - Proceedings of the 9th International Symposium on Quality Electronic Design, ISQED 2008
SP - 200
EP - 206
BT - Proceedings of the 9th International Symposium on Quality Electronic Design, ISQED 2008
T2 - 9th International Symposium on Quality Electronic Design, ISQED 2008
Y2 - 17 March 2008 through 19 March 2008
ER -