TY - GEN
T1 - A clock boosting scheme for low voltage circuits
AU - Behradfar, Amir Ehsan
AU - Zeinolabedinzadeh, Saeed
AU - HajSadeghi, Khosrow
PY - 2008
Y1 - 2008
N2 - Limitations in operation of analog switches at very low voltages have caused many problems in design of these types of switched capacitor circuits and data converters. In this paper by modifying a recently proposed clock boosting circuit, we could obtain a new structure with better performance for very low voltage circuits. This method requires simpler digital circuits in comparison with previously reported structures, as well as less number of transistors and smaller chip area. This method can be used for sampling the full swing signals with supply voltages as low as 0.4 volt.
AB - Limitations in operation of analog switches at very low voltages have caused many problems in design of these types of switched capacitor circuits and data converters. In this paper by modifying a recently proposed clock boosting circuit, we could obtain a new structure with better performance for very low voltage circuits. This method requires simpler digital circuits in comparison with previously reported structures, as well as less number of transistors and smaller chip area. This method can be used for sampling the full swing signals with supply voltages as low as 0.4 volt.
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U2 - 10.1109/ICECS.2008.4674781
DO - 10.1109/ICECS.2008.4674781
M3 - Conference contribution
AN - SCOPUS:57849102743
SN - 9781424421824
T3 - Proceedings of the 15th IEEE International Conference on Electronics, Circuits and Systems, ICECS 2008
SP - 21
EP - 24
BT - Proceedings of the 15th IEEE International Conference on Electronics, Circuits and Systems, ICECS 2008
T2 - 15th IEEE International Conference on Electronics, Circuits and Systems, ICECS 2008
Y2 - 31 August 2008 through 3 September 2008
ER -