VLSI implementation of discrete wavelet transform

A. Grzeszczak, T. H. Yeap, S. Panchanathan

Research output: Contribution to journalConference articlepeer-review


This paper presents a VLSI implementation of Discrete Wavelet Transform (DWT). The architecture is systolic in nature and performs both high-pass and low-pass coefficient calculations with only one set of multipliers, in contrast to the approaches presented in the literature [1], [2], [3]. The architecture is simple, modular, and cascadable, and has been implemented in VLSI. Experimental results show that real-time coefficient calculation on a 512 X 512 monochrome video input can be achieved with 1.2 μm technology.

Original languageEnglish (US)
Pages (from-to)71-74
Number of pages4
JournalProceedings of the Annual IEEE International ASIC Conference and Exhibit
StatePublished - Dec 1 1995
Externally publishedYes
EventProceedings of the 8th Annual IEEE International ASIC Conference and Exhibit - Austin, TX, USA
Duration: Sep 18 1995Sep 22 1995

ASJC Scopus subject areas

  • Electrical and Electronic Engineering


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