Abstract
We describe the fabrication and operation of a polysilicon room-temperature memory device. The source-drain current-voltage (I-V) characteristics of this device, with floating gate, demonstrate periodic current steps as well as hysteresis generic for a memory device. Electron micrographs show that the channel consists of 3-5 nm silicon grains. A model of single charge trapping controlled conduction through the device channel is suggested.
Original language | English (US) |
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Pages (from-to) | 1328-1332 |
Number of pages | 5 |
Journal | Semiconductor Science and Technology |
Volume | 13 |
Issue number | 11 |
DOIs | |
State | Published - Nov 1 1998 |
ASJC Scopus subject areas
- Electronic, Optical and Magnetic Materials
- Condensed Matter Physics
- Electrical and Electronic Engineering
- Materials Chemistry