Transport in split gate MOS quantum dot structures

Stephen Goodnick; J. Bird; D. K. Ferry; A. D. Gunther; M. D. Khoury; Michael Kozicki; M. J. Rack; Trevor Thornton; Dragica Vasileska

Transport in split gate MOS quantum dot structures

Stephen Goodnick, J. Bird, D. K. Ferry, A. D. Gunther, M. D. Khoury, Michael Kozicki, M. J. Rack, Trevor Thornton, Dragica Vasileska

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Abstract

A novel technique has been developed for the fabrication of Si quantum dot structures with controllable electron number through both top and side gates. We have tested devices ranging in size from 40 to 200nm. By varying the density with the top gate, and controlling the input and output barriers of the dot with the side gates, conductance peaks are observed which map details of the energy level within the dot as well as the interaction of the electrons with one another.

Original language	English (US)
Title of host publication	Proceedings of the IEEE Great Lakes Symposium on VLSI
Publisher	IEEE
Pages	394-396
Number of pages	3
ISBN (Print)	0769501044
State	Published - Dec 1 1999
Event	Proceedings of the 1999 9th Great Lakes Symposium on VLSI (GLSVLSI '99) - Ann Arbor, MI, USA Duration: Mar 4 1999 → Mar 6 1999

Publication series

Name	Proceedings of the IEEE Great Lakes Symposium on VLSI
ISSN (Print)	1066-1395

Other

Other	Proceedings of the 1999 9th Great Lakes Symposium on VLSI (GLSVLSI '99)
City	Ann Arbor, MI, USA
Period	3/4/99 → 3/6/99

ASJC Scopus subject areas

Electrical and Electronic Engineering

Cite this

Goodnick, S, Bird, J, Ferry, DK, Gunther, AD, Khoury, MD, Kozicki, M, Rack, MJ, Thornton, T & Vasileska, D 1999, Transport in split gate MOS quantum dot structures. in Proceedings of the IEEE Great Lakes Symposium on VLSI. Proceedings of the IEEE Great Lakes Symposium on VLSI, IEEE, pp. 394-396, Proceedings of the 1999 9th Great Lakes Symposium on VLSI (GLSVLSI '99), Ann Arbor, MI, USA, 3/4/99.

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abstract = "A novel technique has been developed for the fabrication of Si quantum dot structures with controllable electron number through both top and side gates. We have tested devices ranging in size from 40 to 200nm. By varying the density with the top gate, and controlling the input and output barriers of the dot with the side gates, conductance peaks are observed which map details of the energy level within the dot as well as the interaction of the electrons with one another.",

author = "Stephen Goodnick and J. Bird and Ferry, {D. K.} and Gunther, {A. D.} and Khoury, {M. D.} and Michael Kozicki and Rack, {M. J.} and Trevor Thornton and Dragica Vasileska",

year = "1999",

month = dec,

day = "1",

language = "English (US)",

isbn = "0769501044",

series = "Proceedings of the IEEE Great Lakes Symposium on VLSI",

publisher = "IEEE",

pages = "394--396",

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note = "Proceedings of the 1999 9th Great Lakes Symposium on VLSI (GLSVLSI '99) ; Conference date: 04-03-1999 Through 06-03-1999",

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T1 - Transport in split gate MOS quantum dot structures

AU - Goodnick, Stephen

AU - Bird, J.

AU - Ferry, D. K.

AU - Gunther, A. D.

AU - Khoury, M. D.

AU - Kozicki, Michael

AU - Rack, M. J.

AU - Thornton, Trevor

AU - Vasileska, Dragica

PY - 1999/12/1

Y1 - 1999/12/1

N2 - A novel technique has been developed for the fabrication of Si quantum dot structures with controllable electron number through both top and side gates. We have tested devices ranging in size from 40 to 200nm. By varying the density with the top gate, and controlling the input and output barriers of the dot with the side gates, conductance peaks are observed which map details of the energy level within the dot as well as the interaction of the electrons with one another.

AB - A novel technique has been developed for the fabrication of Si quantum dot structures with controllable electron number through both top and side gates. We have tested devices ranging in size from 40 to 200nm. By varying the density with the top gate, and controlling the input and output barriers of the dot with the side gates, conductance peaks are observed which map details of the energy level within the dot as well as the interaction of the electrons with one another.

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M3 - Conference contribution

AN - SCOPUS:0033353818

SN - 0769501044

T3 - Proceedings of the IEEE Great Lakes Symposium on VLSI

SP - 394

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BT - Proceedings of the IEEE Great Lakes Symposium on VLSI

PB - IEEE

T2 - Proceedings of the 1999 9th Great Lakes Symposium on VLSI (GLSVLSI '99)

Y2 - 4 March 1999 through 6 March 1999

ER -

Transport in split gate MOS quantum dot structures

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