Systolic array architecture for image coding using vector quantization

A systolic array architecture for image coding using vector quantization (VQ) is presented. The high-speed architectures for VQ reported thus far in the literature only implement image encoding but not codebook generation. In the proposed architecture, the encoding and codebook generation operations are overlapped in the same structure. A basic systolic cell is designed with two modes (forward and reverse) of operation. In the forward mode, the cell executes the basic operation in a VQ encoder, namely, distortion computation. In the reverse mode, the cell executes the new codeword computation operation. An array of L × N cells is connected in parallel and pipeline in the directions of vector dimension, L, and codeword dimension, N, respectively. The two modes of operation take place simultaneously with a delay buffer used to synchronize the operations. The regular and iterable structure makes possible the VLSI implementation of the architecture.