Sphere decoding for multiprocessor architectures

Q. Qi; Chaitali Chakrabarti

doi:10.1109/SIPS.2007.4387516

Sphere decoding for multiprocessor architectures

Q. Qi, Chaitali Chakrabarti

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

4 Scopus citations

Abstract

Motivated by the need for high throughput sphere decoding for multiple-input-multiple-output (MIMO) communication systems, we propose a parallel depth-first sphere decoding (PDSD) algorithm that provides the advantages of both parallel processing and rapid search space reduction. The PDSD algorithm is designed for efficient implementation on programmable multi-processor platforms. We investigate the trade-off between the throughput and computation over-head when the number of processing elements is 2,4 and 8, for a 4 × 4 16-QAM system across a wide range of SNR conditions. Through simulation, we show that PDSD can offer significant throughput improvement without incurring substantial computation overhead by selecting the appropriate number of processing elements according to specific SNR conditions.

Original language	English (US)
Title of host publication	2007 IEEE Workshop on Signal Processing Systems, SiPS 2007, Proceedings
Pages	50-55
Number of pages	6
DOIs	https://doi.org/10.1109/SIPS.2007.4387516
State	Published - 2007
Event	2007 IEEE Workshop on Signal Processing Systems, SiPS 2007 - Shanghai, China Duration: Oct 17 2007 → Oct 19 2007

Publication series

Name	IEEE Workshop on Signal Processing Systems, SiPS: Design and Implementation
ISSN (Print)	1520-6130

Other

Other	2007 IEEE Workshop on Signal Processing Systems, SiPS 2007
Country/Territory	China
City	Shanghai
Period	10/17/07 → 10/19/07

Keywords

Architecture
Multiprocessor
Sphere decoding

ASJC Scopus subject areas

Media Technology
Signal Processing

Access to Document

10.1109/SIPS.2007.4387516

Cite this

Qi, Q & Chakrabarti, C 2007, Sphere decoding for multiprocessor architectures. in 2007 IEEE Workshop on Signal Processing Systems, SiPS 2007, Proceedings., 4387516, IEEE Workshop on Signal Processing Systems, SiPS: Design and Implementation, pp. 50-55, 2007 IEEE Workshop on Signal Processing Systems, SiPS 2007, Shanghai, China, 10/17/07. https://doi.org/10.1109/SIPS.2007.4387516

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title = "Sphere decoding for multiprocessor architectures",

abstract = "Motivated by the need for high throughput sphere decoding for multiple-input-multiple-output (MIMO) communication systems, we propose a parallel depth-first sphere decoding (PDSD) algorithm that provides the advantages of both parallel processing and rapid search space reduction. The PDSD algorithm is designed for efficient implementation on programmable multi-processor platforms. We investigate the trade-off between the throughput and computation over-head when the number of processing elements is 2,4 and 8, for a 4 × 4 16-QAM system across a wide range of SNR conditions. Through simulation, we show that PDSD can offer significant throughput improvement without incurring substantial computation overhead by selecting the appropriate number of processing elements according to specific SNR conditions.",

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author = "Q. Qi and Chaitali Chakrabarti",

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language = "English (US)",

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series = "IEEE Workshop on Signal Processing Systems, SiPS: Design and Implementation",

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AU - Chakrabarti, Chaitali

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AB - Motivated by the need for high throughput sphere decoding for multiple-input-multiple-output (MIMO) communication systems, we propose a parallel depth-first sphere decoding (PDSD) algorithm that provides the advantages of both parallel processing and rapid search space reduction. The PDSD algorithm is designed for efficient implementation on programmable multi-processor platforms. We investigate the trade-off between the throughput and computation over-head when the number of processing elements is 2,4 and 8, for a 4 × 4 16-QAM system across a wide range of SNR conditions. Through simulation, we show that PDSD can offer significant throughput improvement without incurring substantial computation overhead by selecting the appropriate number of processing elements according to specific SNR conditions.

KW - Architecture

KW - Multiprocessor

KW - Sphere decoding

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Sphere decoding for multiprocessor architectures

Abstract

Publication series

Other

Keywords

ASJC Scopus subject areas

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