Scalable and parameterised VLSI architecture for efficient sparse approximation in FPGAs and SoCs

Keyphrases

• Sparse Approximation 100%
• Very Large Scale Integration (VLSI) Architecture 100%
• Field Programmable Gate Array 100%
• Intellectual Property 66%
• Evaluation Results 33%
• High-throughput 33%
• Proposed Architecture 33%
• Large Dynamic Range 33%
• Customization 33%
• Design Parameters 33%
• Resource Sharing 33%
• Design Flexibility 33%
• Very Large Scale Integration 33%
• System-on-chip Design 33%
• Orthogonal Matching Pursuit Algorithm 33%
• Programmable Logic Device 33%
• Intellectual Property Core 33%
• Floating-point Data 33%

Computer Science

• Very large-scale integration (VLSI) architecture 100%
• Sparse Approximation 100%
• Field Programmable Gate Arrays 100%
• Intellectual Property 100%
• Data Type 33%
• High Throughput 33%
• Customisation 33%
• Design Parameter 33%
• Resource Sharing 33%
• System on a Chip 33%
• Floating Point 33%
• Pursuit Algorithm 33%
• Programmable Logic Devices 33%
• Very Large Scale Integration 33%
• Orthogonal Matching Pursuit 33%