TY - GEN
T1 - Resistive Switching Early Failure and Gap Identification in Bilayer Selectorless RRAM Applications
AU - Chen, Ying Chen
AU - Hu, Szu Tung
AU - Lin, Chao Cheng
AU - Lee, Jack C.
N1 - Publisher Copyright:
© 2019 IEEE.
PY - 2019/6
Y1 - 2019/6
N2 - Resistive random access memory (RRAM) using various metal oxides (i.e., SiO[1], HfO, NiO[2], AlO, TaO5 etc.) have attracted a great attention since the current nonvolatile memory (NVM) has been approaching the scaling limits. However, the sneak path current (SPC) is a main problem in crossbar memory configuration. The SPC significantly affects the read/write operation, because each word line is connected in perpendicular directions to the word line where the interference current from neighbor cells cannot be avoided in the crossbar configurations. In order to suppress the sneak path current in the array application, the transistor, diode, or selector device is designed to be integrated next to the memory cell for reducing the SPC. However, the additional selector device in the socalled 1T-1R or 1S-1R architecture (Fig. 1(a)) increases the cell size, process complexity, and cost. Therefore, the self-rectifying behavior i.e. nonlinear resistive switching (RS) in a 1R-only selectorless RRAM cell has been proposed [3]-[6]. However, the mechanisms in nonlinear characteristic and reliability properties are not yet been investigated. This work studies the reliability of early failure and relaxation properties using gap identification method.
AB - Resistive random access memory (RRAM) using various metal oxides (i.e., SiO[1], HfO, NiO[2], AlO, TaO5 etc.) have attracted a great attention since the current nonvolatile memory (NVM) has been approaching the scaling limits. However, the sneak path current (SPC) is a main problem in crossbar memory configuration. The SPC significantly affects the read/write operation, because each word line is connected in perpendicular directions to the word line where the interference current from neighbor cells cannot be avoided in the crossbar configurations. In order to suppress the sneak path current in the array application, the transistor, diode, or selector device is designed to be integrated next to the memory cell for reducing the SPC. However, the additional selector device in the socalled 1T-1R or 1S-1R architecture (Fig. 1(a)) increases the cell size, process complexity, and cost. Therefore, the self-rectifying behavior i.e. nonlinear resistive switching (RS) in a 1R-only selectorless RRAM cell has been proposed [3]-[6]. However, the mechanisms in nonlinear characteristic and reliability properties are not yet been investigated. This work studies the reliability of early failure and relaxation properties using gap identification method.
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U2 - 10.1109/DRC46940.2019.9046451
DO - 10.1109/DRC46940.2019.9046451
M3 - Conference contribution
AN - SCOPUS:85083189836
T3 - Device Research Conference - Conference Digest, DRC
SP - 89
EP - 90
BT - 2019 Device Research Conference, DRC 2019
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 2019 Device Research Conference, DRC 2019
Y2 - 23 June 2019 through 26 June 2019
ER -