Quantum confinements in highly asymmetric sub-micrometer device structures

With the ongoing miniaturization of MOSFET structures into the nanometer domain, experimental results suggest there are physical limits up to which one can reduce the gate lengths. Furthermore, it becomes progressively more difficult to overcome the short channel effects at small gate lengths. This has led the researchers in the industry to look for alternative device technologies. One solution to the problem are the asymmetric device structures. In this work, we have simulated a 50 nm asymmetric MOS device structure using a two-dimensional Monte Carlo Poisson particle-based solver, in which quantum effects have been taken into account via the effective potential scheme. The quantum effects in these small device structures lead to strong quantum confinement of the carriers at the semiconductor/oxide interface, thus affecting the device drive current and the threshold voltage. We also show that the Silvaco Atlas simulations performed on the same device structure using the energy balance model were strongly affected by the choice of the energy relaxation times.