Probabilistic Risk-Aware Scheduling with Deadline Constraint for Heterogeneous SoCs

Xing Chen, Umit Ogras, Chaitali Chakrabarti

Research output: Contribution to journalArticlepeer-review

4 Scopus citations


Hardware Trojans can compromise System-on-Chip (SoC) performance. Protection schemes implemented to combat these threats cannot guarantee 100% detection rate and may also introduce performance overhead. This paper defines the risk of running a job on an SoC as a function of the misdetection rate of the hardware Trojan detection methods implemented on the cores in the SoC. Given the user-defined deadlines of each job, our goal is to minimize the job-level risk as well as the deadline violation rate for both static and dynamic scheduling scenarios. We assume that there is no relationship between the execution time and risk of a task executed on a core. Our risk-Aware scheduling algorithm first calculates the probability of possible task allocations and then uses it to derive the task-level deadlines. Each task is then allocated to the core with minimum risk that satisfies the task-level deadline. In addition, in dynamic scheduling, where multiple jobs are injected randomly, we propose to explicitly operate with a reduced virtual deadline to avoid possible future deadline violations. Simulations on randomly generated graphs show that our static scheduler has no deadline violations and achieves 5.1%-17.2% lower job-level risk than the popular Earliest Time First (ETF) algorithm when the deadline constraint is 1.2×-3.0× the makespan of ETF. In the dynamic case, the proposed algorithm achieves a violation rate comparable to that of Earliest Deadline First (EDF), an algorithm optimized for dynamic scenarios. Even when the injection rate is high, it outperforms EDF with 8.4%-10% lower risk when the deadline is 1.5×-3.0× the makespan of ETF.

Original languageEnglish (US)
Article number15
JournalACM Transactions on Embedded Computing Systems
Issue number2
StatePublished - Feb 8 2022


  • System on Chip(SoC)
  • dynamic scheduling
  • heterogeneous SoC
  • scheduling algorithm
  • static scheduling

ASJC Scopus subject areas

  • Software
  • Hardware and Architecture


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