Abstract
Quantum transport is becoming more significant as device size shrinks. For example, as device sizes are scaled below 0.1 μm, the number of impurities becomes quite small, so that they are no longer homogeneously distributed throughout the device volume and the carriers are localized into quantum boxes, in that self-energy corrections produced by locally high carrier densities will lead to quantum dot formation. This leads to the need to discuss transport through an array of such quantum structures. Here, we discuss several issues which must be considered in treating the transport through such devices.
| Original language | English (US) |
|---|---|
| Pages (from-to) | 165-172 |
| Number of pages | 8 |
| Journal | VLSI Design |
| Volume | 8 |
| Issue number | 1-4 |
| DOIs | |
| State | Published - 1998 |
Keywords
- Device modeling
- Impurities
- Quantum transport
ASJC Scopus subject areas
- Hardware and Architecture
- Computer Graphics and Computer-Aided Design
- Electrical and Electronic Engineering
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