@inproceedings{54e4da2e0729482896480b9bcdbe5efc,
title = "Hybrid Polymorphic Logic Gate with 5-Terminal Magnetic Domain Wall Motion Device",
abstract = "In this paper, a key-controlled hybrid spin-CMOS polymorphic logic gate using a novel 5 terminal magnetic domain wall motion device is proposed. The proposed hybrid polymorphic gate is able to perform a full set of 2-input Boolean logic functions (i.e. AND/NAND, OR/NOR, NOT, XOR/XNOR) by configuring the applied keys. The SPICE device-circuit co-simulation indicates that a full adder design using our proposed polymorphic logic gate shows 74.23% power reduction and 7.14% transistor count reduction compared with traditional CMOS full adder design. Our proposed polymorphic gate could be a promising hardware security primitive to address IC counterfeiting or reverse engineering by logic locking and polymorphic transformation. To summarize, by providing zero leakage power, low dynamic power consumption, compactness and polymorphism to logic circuits, our proposed design can thrive a new paradigm for future power efficient and secured computing platform.",
keywords = "domain wall motion, magnetic tunnel junction, Polymorphic gate, secured computing, spintronics",
author = "Farhana Parveen and Zhezhi He and Shaahin Angizi and Deliang Fan",
year = "2017",
month = jul,
day = "20",
doi = "10.1109/ISVLSI.2017.35",
language = "English (US)",
series = "Proceedings of IEEE Computer Society Annual Symposium on VLSI, ISVLSI",
publisher = "IEEE Computer Society",
pages = "152--157",
editor = "Ricardo Reis and Mircea Stan and Michael Huebner and Nikolaos Voros",
booktitle = "Proceedings - 2017 IEEE Computer Society Annual Symposium on VLSI, ISVLSI 2017",
note = "2017 IEEE Computer Society Annual Symposium on VLSI, ISVLSI 2017 ; Conference date: 03-07-2017 Through 05-07-2017",
}