TY - GEN
T1 - Full-band particle-based analysis of device scaling for 3D tri-gate FETs
AU - Chiney, P.
AU - Branlard, J.
AU - Aboud, S.
AU - Saraniti, Marco
AU - Goodnick, Stephen
PY - 2004/12/1
Y1 - 2004/12/1
N2 - The impact of scaling the thickness, width and height of a 3D tri-gate SOI FET with a wrap around gate geometry was investigated. An analysis of the frequency response of the tri-gate structure was also performed to investigate the influence scaling has on the dynamic response. Tri-gate FETs show superior scalability over planar device structures, including a reduction of short channel effects. The approximate values of the transconductance and channel conductance obtained from the simulation were observed to be 1800 μS/μm and 1000 μS/μm.
AB - The impact of scaling the thickness, width and height of a 3D tri-gate SOI FET with a wrap around gate geometry was investigated. An analysis of the frequency response of the tri-gate structure was also performed to investigate the influence scaling has on the dynamic response. Tri-gate FETs show superior scalability over planar device structures, including a reduction of short channel effects. The approximate values of the transconductance and channel conductance obtained from the simulation were observed to be 1800 μS/μm and 1000 μS/μm.
UR - http://www.scopus.com/inward/record.url?scp=21844467254&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=21844467254&partnerID=8YFLogxK
M3 - Conference contribution
AN - SCOPUS:21844467254
SN - 0780386493
T3 - 2004 10th International Workshop on Computational Electronics, IEEE IWCE-10 2004, Abstracts
SP - 97
EP - 98
BT - 2004 10th International Workshop on Computational Electronics, IEEE IWCE-10 2004, Abstracts
T2 - 2004 10th International Workshop on Computational Electronics: The Field of Computational Electronics - Looking Back and Looking Ahead, IEEE IWCE-10 2004, Abstracts
Y2 - 24 October 2004 through 27 October 2004
ER -