TY - GEN
T1 - FeFET-based low-power bitwise logic-in-memory with direct write-back and data-Adaptive dynamic sensing interface
AU - Lee, Mingyen
AU - Tang, Wenjun
AU - Xue, Bowen
AU - Wu, Juejian
AU - Ma, Mingyuan
AU - Wang, Yu
AU - Liu, Yongpan
AU - Fan, Deliang
AU - Narayanan, Vijaykrishnan
AU - Yang, Huazhong
AU - Li, Xueqing
N1 - Funding Information:
This work is supported in part by National Key Research and Development Program of China (#2018YFA0701500), in part by NSFC (#61874066, #61720106013), and in part by ICFC. M. Lee, W. Tang and B. Xue contribute equally to this work. The authors would like to thank Prof. Sumeet Gupta from Purdue for the model support.
Publisher Copyright:
© 2020 ACM.
PY - 2020/8/10
Y1 - 2020/8/10
N2 - Compute-in-memory (CiM) is a promising method for mitigating the memory wall problem in data-intensive applications. The proposed bitwise logic-in-memory (BLiM) is targeted at data intensive applications, such as database, data encryption. This work proposes a low-power BLiM approach using the emerging nonvolatile ferroelectric FETs with direct write-back and data-Adaptive dynamic sensing interface. Apart from general-purpose random-Access memory, it also supports BLiM operations such as copy, not, nand, xor, and full adder (FA). The novel features of the proposed architecture include: (i) direct result-write-back based on the remnant bitline BLiM charge that avoids bitline sensing and charging operations; (ii) a fully dynamic sensing interface that needs no static reference current, but adopts data-Adaptive voltage references for certain multi-operand operations, and (iii) selective bitline charging from wordline (instead of pre-charging all bitlines) to save power and also enable direct write-back. Detailed BLiM operations and benchmarking against conventional approaches show the promise of low-power computing with the FeFET-based circuit techniques.
AB - Compute-in-memory (CiM) is a promising method for mitigating the memory wall problem in data-intensive applications. The proposed bitwise logic-in-memory (BLiM) is targeted at data intensive applications, such as database, data encryption. This work proposes a low-power BLiM approach using the emerging nonvolatile ferroelectric FETs with direct write-back and data-Adaptive dynamic sensing interface. Apart from general-purpose random-Access memory, it also supports BLiM operations such as copy, not, nand, xor, and full adder (FA). The novel features of the proposed architecture include: (i) direct result-write-back based on the remnant bitline BLiM charge that avoids bitline sensing and charging operations; (ii) a fully dynamic sensing interface that needs no static reference current, but adopts data-Adaptive voltage references for certain multi-operand operations, and (iii) selective bitline charging from wordline (instead of pre-charging all bitlines) to save power and also enable direct write-back. Detailed BLiM operations and benchmarking against conventional approaches show the promise of low-power computing with the FeFET-based circuit techniques.
KW - FeFET
KW - bitwise logic-in-memory
KW - compute-in-memory
KW - embedded memory
KW - memory wall
KW - nonvolatile memory
UR - http://www.scopus.com/inward/record.url?scp=85098257052&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=85098257052&partnerID=8YFLogxK
U2 - 10.1145/3370748.3406572
DO - 10.1145/3370748.3406572
M3 - Conference contribution
AN - SCOPUS:85098257052
T3 - ACM International Conference Proceeding Series
BT - Proceedings of the ACM/IEEE International Symposium on Low Power Electronics and Design, ISLPED 2020
PB - Association for Computing Machinery
T2 - 2020 ACM/IEEE International Symposium on Low Power Electronics and Design, ISLPED 2020
Y2 - 10 August 2020 through 12 August 2020
ER -