Electrode/oxide interface engineering by inserting single-layer graphene: Application for HfOx-based resistive random access memory

Hong Yu Chen, He Tian, Bin Gao, Shimeng Yu, Jiale Liang, Jinfeng Kang, Yuegang Zhang, Tian Ling Ren, H. S.Philip Wong

Research output: Chapter in Book/Report/Conference proceedingConference contribution

6 Scopus citations

Abstract

Electrode/oxide interface with inserted single-layer graphene (SLG) increases low resistance state (LRS) resistance (> 1M) due to its intrinsically high out-of-plane resistance in HfOx-based resistive random access memory (RRAM). This interface engineering technique enables the reduction of the RESET current by 22 times and the programming power consumption by 47 times. The interface between oxide layer and metal electrode is studied using Ramen spectroscopy coupled with electrical measurement. Raman mapping and single point measurements show noticeable changes in both D-band and G-band signals of SLG during electrical cycling. This observation suggests a possible interaction of oxygen migrated from the metal oxide with the graphene. This work illustrates that interface engineering design plays an important role for RRAM material selection in addition to exploring different metal oxides or metal electrode materials for RRAM.

Original languageEnglish (US)
Title of host publication2012 IEEE International Electron Devices Meeting, IEDM 2012
Pages20.5.1-20.5.4
DOIs
StatePublished - Dec 1 2012
Event2012 IEEE International Electron Devices Meeting, IEDM 2012 - San Francisco, CA, United States
Duration: Dec 10 2012Dec 13 2012

Publication series

NameTechnical Digest - International Electron Devices Meeting, IEDM
ISSN (Print)0163-1918

Other

Other2012 IEEE International Electron Devices Meeting, IEDM 2012
Country/TerritoryUnited States
CitySan Francisco, CA
Period12/10/1212/13/12

ASJC Scopus subject areas

  • Electronic, Optical and Magnetic Materials
  • Condensed Matter Physics
  • Electrical and Electronic Engineering
  • Materials Chemistry

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