Efficient architectures for hidden surface removal

We present several new efficient architectures to solve the hidden surface problem in the feature domain. All the architectures operate on segments (instead of pixels) and create a list of visible segments for each scan line. We present two new semi-systolic architectures consisting of an array of M processors, where M is the maximum number of overlapping segments. Both architectures require presorting of the segment endpoints and have a latency of O(N), where N is the number of input segments. We present two new sorting network architectures which do not require any presorting of the endpoints. These architectures consist of O(log N) stages of segment merge units and are based on odd-even merge sort and running merge sort.