@inproceedings{43353b6891d84fde9460e5e866cd3d4a,
title = "DSPIMM: A Fully Digital SParse In-Memory Matrix Vector Multiplier for Communication Applications",
abstract = "Channel decoders are key computing modules in wired/wireless communication systems. Recently neural network (NN)-based decoders have shown their promising error-correcting performance because of their end-to-end learning capability. However, compared with the traditional approaches, the emerging neural belief propagation (NBP) solution suffers higher storage and computational complexity, limiting its hardware performance. To address this challenge and develop a channel decoder that can achieve high decoding performance and hardware performance simultaneously, in this paper we take a first step towards exploring SRAM-based in-memory computing for efficient NBP channel decoding. We first analyze the unique sparsity pattern in the NBP processing, and then propose an efficient and fully Digital Sparse In-Memory Matrix vector Multiplier (DSPIMM) computing platform. Extensive experiments demonstrate that our proposed DSPIMM achieves significantly higher energy efficiency and throughput than the state-of-the-art counterparts.",
keywords = "In-Memory-Computing, MAC, Neural Decoder, SRAM, Sparsity",
author = "Amitesh Sridharan and Fan Zhang and Yang Sui and Bo Yuan and Deliang Fan",
note = "Publisher Copyright: {\textcopyright} 2023 IEEE.; 60th ACM/IEEE Design Automation Conference, DAC 2023 ; Conference date: 09-07-2023 Through 13-07-2023",
year = "2023",
doi = "10.1109/DAC56929.2023.10247829",
language = "English (US)",
series = "Proceedings - Design Automation Conference",
publisher = "Institute of Electrical and Electronics Engineers Inc.",
booktitle = "2023 60th ACM/IEEE Design Automation Conference, DAC 2023",
}