Diet SODA: A power-efficient processor for digital cameras

Sangwon Seo, Ronald G. Dreslinski, Mark Who, Chaitali Chakrabarti, Scott Mahlke, Trevor Mudge

Research output: Chapter in Book/Report/Conference proceedingConference contribution

23 Scopus citations

Abstract

Power has become the most critical design constraint for embedded handheld devices. This paper proposes a power-efficient SIMD architecture, referred to as Diet SODA, for DSP applications. The key design idea is to apply near-threshold operation on a single instruction and multiple data (SIMD) architecture to significantly lower the power consumption. The major features of Diet SODA are very wide SIMD width, scatter/gather data prefetcher, and dual mode operation. A case study was performed on digital still camera (DSC) applications; the results show that Diet SODA achieves ∼130x better performance and ∼340x better energy efficiency than a DSP solution.

Original languageEnglish (US)
Title of host publicationISLPED'10 - Proceedings of the 16th ACM/IEEE International Symposium on Low-Power Electronics and Design
Pages79-84
Number of pages6
DOIs
StatePublished - 2010
Event16th ACM/IEEE International Symposium on Low-Power Electronics and Design, ISLPED'10 - Austin, TX, United States
Duration: Aug 18 2010Aug 20 2010

Publication series

NameProceedings of the International Symposium on Low Power Electronics and Design
ISSN (Print)1533-4678

Other

Other16th ACM/IEEE International Symposium on Low-Power Electronics and Design, ISLPED'10
Country/TerritoryUnited States
CityAustin, TX
Period8/18/108/20/10

Keywords

  • Digital still cameras
  • Dynamic voltage scaling
  • Near-threshold
  • SIMD

ASJC Scopus subject areas

  • Engineering(all)

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