Device and circuit optimization of RRAM for neuromorphic computing

Huaqiang Wu; Peng Yao; Bin Gao; Wei Wu; Qingtian Zhang; Wenqiang Zhang; Ning Deng; Dong Wu; H. S.Philip Wong; Shimeng Yu; He Qian

doi:10.1109/IEDM.2017.8268372

Device and circuit optimization of RRAM for neuromorphic computing

Huaqiang Wu, Peng Yao, Bin Gao, Wei Wu, Qingtian Zhang, Wenqiang Zhang, Ning Deng, Dong Wu, H. S.Philip Wong, Shimeng Yu, He Qian

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

35 Scopus citations

Abstract

RRAM is a promising electrical synaptic device for efficient neuromorphic computing. A human face recognition task was demonstrated on a 1k-bit 1T1R array using an online training perceptron network. The RRAM device structure and materials stack were optimized to achieve reliable bidirectional analog switching behavior. A binarized-hidden-layer (BHL) circuit architecture is proposed to minimize the needs of A/D and D/A converters between RRAM crossbars. Several RRAM non-ideal characteristics were carefully evaluated for handwritten digits' recognition task with proposed BHL architecture and modified neural network algorithm.

Original language	English (US)
Title of host publication	2017 IEEE International Electron Devices Meeting, IEDM 2017
Publisher	Institute of Electrical and Electronics Engineers Inc.
Pages	11.5.1-11.5.4
ISBN (Electronic)	9781538635599
DOIs	https://doi.org/10.1109/IEDM.2017.8268372
State	Published - Jan 23 2018
Event	63rd IEEE International Electron Devices Meeting, IEDM 2017 - San Francisco, United States Duration: Dec 2 2017 → Dec 6 2017

Publication series

Name	Technical Digest - International Electron Devices Meeting, IEDM
ISSN (Print)	0163-1918

Other

Other	63rd IEEE International Electron Devices Meeting, IEDM 2017
Country/Territory	United States
City	San Francisco
Period	12/2/17 → 12/6/17

ASJC Scopus subject areas

Electronic, Optical and Magnetic Materials
Condensed Matter Physics
Materials Chemistry
Electrical and Electronic Engineering

Access to Document

10.1109/IEDM.2017.8268372

Cite this

Wu, H., Yao, P., Gao, B., Wu, W., Zhang, Q., Zhang, W., Deng, N., Wu, D., Wong, H. S. P., Yu, S., & Qian, H. (2018). Device and circuit optimization of RRAM for neuromorphic computing. In 2017 IEEE International Electron Devices Meeting, IEDM 2017 (pp. 11.5.1-11.5.4). (Technical Digest - International Electron Devices Meeting, IEDM). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/IEDM.2017.8268372

Device and circuit optimization of RRAM for neuromorphic computing. / Wu, Huaqiang; Yao, Peng; Gao, Bin et al.
2017 IEEE International Electron Devices Meeting, IEDM 2017. Institute of Electrical and Electronics Engineers Inc., 2018. p. 11.5.1-11.5.4 (Technical Digest - International Electron Devices Meeting, IEDM).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Wu, H, Yao, P, Gao, B, Wu, W, Zhang, Q, Zhang, W, Deng, N, Wu, D, Wong, HSP, Yu, S & Qian, H 2018, Device and circuit optimization of RRAM for neuromorphic computing. in 2017 IEEE International Electron Devices Meeting, IEDM 2017. Technical Digest - International Electron Devices Meeting, IEDM, Institute of Electrical and Electronics Engineers Inc., pp. 11.5.1-11.5.4, 63rd IEEE International Electron Devices Meeting, IEDM 2017, San Francisco, United States, 12/2/17. https://doi.org/10.1109/IEDM.2017.8268372

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abstract = "RRAM is a promising electrical synaptic device for efficient neuromorphic computing. A human face recognition task was demonstrated on a 1k-bit 1T1R array using an online training perceptron network. The RRAM device structure and materials stack were optimized to achieve reliable bidirectional analog switching behavior. A binarized-hidden-layer (BHL) circuit architecture is proposed to minimize the needs of A/D and D/A converters between RRAM crossbars. Several RRAM non-ideal characteristics were carefully evaluated for handwritten digits' recognition task with proposed BHL architecture and modified neural network algorithm.",

author = "Huaqiang Wu and Peng Yao and Bin Gao and Wei Wu and Qingtian Zhang and Wenqiang Zhang and Ning Deng and Dong Wu and Wong, {H. S.Philip} and Shimeng Yu and He Qian",

note = "Funding Information: This work is supported in part by the Beijing Advanced Innovation Center for Future Chip (ICFC), National Key Research and Development Program of China (2016YFA0201803), National Hi-tech (R&D) Project of China (2014AA032901), NSFC (61674089), NSF Expeditions in Computing (#1317470) and Stanford SystemX Alliance. Publisher Copyright: {\textcopyright} 2017 IEEE.; 63rd IEEE International Electron Devices Meeting, IEDM 2017 ; Conference date: 02-12-2017 Through 06-12-2017",

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Device and circuit optimization of RRAM for neuromorphic computing

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