DC-line current ripple reduction of a parallel hybrid modular multilevel HVDC converter

Jiangchao Qin, Maryam Saeedifard

Research output: Chapter in Book/Report/Conference proceedingConference contribution

4 Scopus citations


Parallel hybrid modular multilevel converter (PH-MMC) is one of the potential converter topologies for highvoltage direct-current (HVDC) transmission systems. Due to the circuit topology of a PHMMC, the dc-bus voltage contains low-order harmonics and cannot be fully regulated at a constant dc voltage. This paper proposes a zero-sequence voltage injection (ZSVI)-based model predictive control (MPC) strategy to control the dc current/power flow and simultaneously minimize the dc-current ripple. The proposed strategy takes the advantage of a cost function minimization technique to determine and inject the optimal zero-sequence voltage components into the dc-bus voltage of a PHMMC system. Performance of the proposed strategy for a 21-level PHMMC-based HVDC station system is evaluated in the PSCAD/EMTDC software environment. The reported results demonstrate the proposed ZSVI-MPC strategy can regulate the dc current while reducing its ripple.

Original languageEnglish (US)
Title of host publication2014 IEEE PES General Meeting / Conference and Exposition
PublisherIEEE Computer Society
ISBN (Electronic)9781479964154
StatePublished - Oct 29 2014
Event2014 IEEE Power and Energy Society General Meeting - National Harbor, United States
Duration: Jul 27 2014Jul 31 2014

Publication series

NameIEEE Power and Energy Society General Meeting
ISSN (Print)1944-9925
ISSN (Electronic)1944-9933


Other2014 IEEE Power and Energy Society General Meeting
Country/TerritoryUnited States
CityNational Harbor

ASJC Scopus subject areas

  • Energy Engineering and Power Technology
  • Nuclear Energy and Engineering
  • Renewable Energy, Sustainability and the Environment
  • Electrical and Electronic Engineering


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